Note: this was primarily tested on LPC5528, but should also applies to 55S2x and 55S6x.
High-speed USB requires external crystal, and it could be selected in 12\16\19.2\20\24\30\32MHz. Because the official EVK uses 16MHz clock, so all the examples and libraries uses 16MHz. If crystal of other frequency is used, it could be set in PLL_SIC register. The code is located in fsl_clock.c:
USBPHY->PLL_SIC = (USBPHY->PLL_SIC & ~USBPHY_PLL_SIC_PLL_DIV_SEL(0x7)) | USBPHY_PLL_SIC_PLL_DIV_SEL(0x06);
0x06 is the PLL divider value: