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标签:计算器

On the way to overclock the TI nspire CX II calculator

2020 年 10 月 18 日分类:玩机#计算器#nspire

Introduction

In case you don't know, nspire CX II is a calculator made by Texas Instruments released in 2018. It has an ARM926EJ-s processor running at 396MHz, 64MB of LPDDR memory, and 128MB of SPI nand flash. Though this is probably already an overkill for a calculator, but, can we get even faster on this calculator? Of course, it would really mean anything. I don't need that additional performance, overclocking a calculator is just like overclocking anything else, it is just purely for fun. If I do need more performance, I would go and pick up a laptop. Let's get started.

Background

To overclock any modern processor, there are two key parts: clock synthesizer, memory controller. The first one boosts up the clock frequency, and the second controls the memory timing to make sure the memory runs at higher frequency (if you are unable to decouple the memory frequency with core frequency). The TI nspire CX II uses a custom SoC which I don't have any documents. The operating system on the nspire CX II is also locked down to disallow any unsigned binary code execution. So to overclock it, there are three steps, 1. Get the "root priviledge" on the nspire OS, 2. Understand how clock generation works on nspire, 3. Write a program to overclock it.

nspire OS

Luckily, the first part has been done by the community. There is a tool called Ndless which exploits some vulnerabilities in the nspire OS to allow unsigned code execution. The version released in September 2019 introduced initial support for nspire CX II. Huge thanks to the ndless team who made this all possible.

Clock synthesizer

The nspire SoC has an internal clock synthesizer (PLL). Since there is no datasheet or manual for the SoC, I have to reverse engineer it to find out how it sets the clock. Luckily, there is a community developed emulator for the nspire CX II, also based on reverse engineering efforts obviously. (Note: CX II suppoort was developed by the same guy who implemented CXII supported for ndless, Vogtinato.)

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Linux for HP Prime G2

2019 年 7 月 23 日分类:软件坑#计算器#Linux

0. Overview

This project aims to port Linux OS to the HP Prime calculator. It is based on the Buildroot distribution. Long term goal is providing an alternative OS on Prime that is more capable than the original OS (PPL support, or better RPN support, native binary code execution for sure, and so on).

Please be aware this project is still in its early stages. It is not useful for general use as a calculator OS yet.

WARNING: THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

WARNING: The software is not fully tested. Installing it might brick your calculator (unable to boot) or you may lose the ability to install the original (stock) HP Prime OS back. Use it at your own risk.

WARNING: None of the software/ documentation/ guide provided shall be used for cheating in the exam. Linux OS shall not be used when using the calculator in the exam or any other cases that doing so would cause academic integrity violations.

If you have any questions, feel free to contact me (zephray at outlook dot com). All scripts are released to public domain (if applicable).

1. Status

Linux OS:

  • [x] DDR initialization
  • [x] U-boot Boot loader
  • [x] Basic Linux OS
  • [x] LCD controller SPI driver
  • [x] LCD fbdev driver
  • [x] PWM backlight driver
  • [x] Touchscreen driver
  • [x] PMIC driver
  • [x] keypad driver
  • [x] NAND flash driver
  • [ ] Standby

Application:

  • [ ] Launcher UI
  • [ ] System settings UI

More applications T.B.D.

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HP Prime G2 Reverse Engineering

2019 年 7 月 13 日分类:硬件坑#计算器#改造
Hint: this post is also available in Chinese.

Specifications

  • CPU:MCIMX6Y2DVM05AB(528MHz,Cortex A7)
  • RAM:H5TQ2G63GFR(256MB,DDR3)
  • Flash:H27U4G8F2D(512MB,3.3V)
  • PMIC:PF1550
  • LCD:GPM1006(320xRGBx240,Serial-RGB,ILI9322B)
  • TSC:GT9288

Boot Mode

The following test points are present on the PCB:

  • BT0L - Boot Mode 0 Low
  • BT0H - Boot Mode 0 High
  • BT1L - Boot Mode 1 Low
  • BT1H - Boot Mode 1 High

Circuits nearby: (front side)

GND  T1H  T1H  GND
10K  10K   0R   NC
TMOD 3V3  T1L  T1L

GND  T0H  T0H  GND
4K7   NC   NC   NC
TCK  3V3  T0L  T1L

To enter USB DFU mode:

  • Remove the 10K resistor between T1H and 3V3
  • Solder a 10K resistor between T0H and 3V3
  • Solder a 0R resistor between T0H and T0L (not sure if necessary)

There should be (lot of) other possible ways to change the bootmode or force it to fallback to the DFU mode.

Note: It is technically not a USB DFU (Device Firmware Upgrade) mode as it does not utilize the standard DFU protocol. It uses the i.MX Serial Download Protocol. I call it DFU as this is a more common term for such things.

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【PjEris】 HP35: 串行处理的艺术(二)

2018 年 4 月 14 日分类:翻译#计算器#HP

别看,还没翻译完

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【PjEris】 HP35: 串行处理的艺术(一)

2018 年 3 月 25 日分类:翻译#计算器#HP#Assembly

注: 本文原作者Andy Lithia,译者Wenting Zhang,原文发布于http://lithcore.cn/?p=2036,转载请注明出处,仅限于用于教育或其它非商业用途。头图来源:HP35 technical data

本篇中,作为整个旅程的起点,我会简单介绍一下整体架构。为了更好的理解本文,你需要有数字电路和计算机架构的基础知识。如果没有,个人建议可以阅读《数字设计以及计算机架构》学习一下。

hp_35_internal_arch

图1. HP 35 内部架构(出自HPJ 1972 第6期)

hp_35_motherboard

图2. HP 35 主板 (出自The HP35 saga)

相比较常见的计算机/计算器架构,HP35的设计非常独特,而这也就是本文即将要介绍的。在hpmuseum.org上有一个页面对HP35的ISA做了较为详尽的介绍。

在本文中,寄存器、元件等的命名以专利文档中出现的为准。

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